Facilitating Preemptive Hardware System Design using Partial Reconfiguration Techniques,
J.D. Dondo; F. Rincón; C. Valderrama; F.J. Villanueva; J. Caba; J.C. López
Journal: Scientific World Journal
Date: 2013
Pages: 1-15
ISSN: 1537-744X (Online)
Volume: 59
Publisher: HINDAWI
In FPGA-based control system design, partial reconfiguration is especially well-suited to implement preemptive systems. In real-time systems the deadline for critical task can compel the preemption of non-critical one. Besides, an asynchronous event can demand immediate attention and, then, force launching a reconfiguration process for high-priority task implementation. If the asynchronous event is previously scheduled an explicit activation of the reconfiguration process is performed. If the event cannot be previously programmed, such as in dynamically scheduled systems, an implicit activation ot the reconfiguration process is demanded. This paper provides a hardware-based approach to explicit and implicit activation of the partial reconfiguration process in dynamically reconfigurable SoCs, and includes all the necessary tasks to cope with this issue. Furthermore, the reconfiguration service introduced in this work allows remote invocation of the reconfiguration process, and then, the remote integration of off-chip components. A model that offers component location transparency is also presented to enhance and facilitate system integration.