Publication

Efficient and decentralized data transfer architecture for component based embedded systems
Efficient and decentralized data transfer architecture for component based embedded systems
D. Fuente de San Venancio; J. Barba; J.D. Dondo; F. Rincón; M.J. Santofimia; J.C. López
Cenference: VLSI Circuits and Systems VI
Location: Grenoble (Francia)
Date: 24/04/2013 - 26/04/2013
Pages: 1-9
ISBN: 978-0-8194-9561-7
Volume: 8764
Abstract
Multimedia embedded systems usually expose a chain-based architecture where each functional stage of the media algorithm is encapsulated in a media core in charge of processing the stream of data. Therefore, in this kind of systems, the interconnection mechanisms are key to cope with the enormous bandwidth demands. In this paper, we present a decentralized data transfer architecture for bus based embedded systems. The communication infrastructure introduced here is parameterizable, dynamically configurable and optimized for hardware media component processing platforms. Unlike conventional approaches, where a software control routine has to oversee all the steps of the data exchanging process (e.g. DMA configuration, trapping interruptions, ...), our approach moves such responsibility to the hardware components which are highly autonomous. This has a positive impact in performance since the processor is not mediating in every single data transfer that takes place in the system.